1. Field of Invention
The present invention relates to a structure of a non-volatile memory device and a manufacturing method and a operating method thereof. More particularly, the invention relates to a structure of a flash memory cell and a manufacturing method and operating method of the flash memory cell.
2. Description of Related Art
FIG. 1A is a cross-sectional view showing a conventional flash memory cell structure. As shown in FIG. 1A, a flash memory cell 100 is formed on a substrate 10. The flash memory cell 100 has a drain terminal 11 and a source terminal 12 in the substrate 10 lying between two adjacent field oxide layers 13. Between the source terminal 12 and the drain terminal 11, there is a stacked gate comprising a controlling gate 14 and a floating gate 15. A gate voltage V. applied to the controlling gate 14 is used for controlling the flash memory cell 100. The floating gate 15 is in a "floating" state without any direct connection with external circuits. Furthermore, between the substrate 10 and the source/drain terminals 11 and 12, there is a P-well region 16.
FIG. 1A also shows the state of action when the flash memory cell 100 is programmed. First, a gate voltage V.sub.G =-9V is applied to the controlling gate 14, a drain voltage V.sub.D =6V is applied to the drain terminal 11, and a well voltage Vwell=0 is applied to the P-well 16. No voltage is applied to the source terminal 12 and the substrate 10, that is, the state of source terminal 12 is floating. With these applied voltages electrons (e.sup.-) will eject from the floating gate 15 to the drain terminal 11 due to the edge Fowler-Nordheim effect so that the flash memory cell is programmed. However, when a voltage is applied to the drain terminal 11, the voltage will create a depletion region 17 outside the drain terminal 11 region. Furthermore, hot holes (e.sup.+) will be generated leading to hot hole injection in the presence of lateral electric field. These hot holes can severely affect the normal operation of a flash memory cell.
To counteract the defects of using the above conventional technique, an improved operating mode is arranged. FIG. 1B is a cross-sectional view showing an improved drain structure for a conventional flash memory cell. The N.sup.- region 18 is used to reduce the strength of lateral electric field so as to eliminate the effect of hot hole injection, which has a better reliability.
Although the improved flash memory cell with the N.sup.- region 18 is able to improve the problem of hot hole injection, but with the N.sup.- region 18 the drain region 11 and the source region 12 become more closer, which causes the punch through occurring easily. In some cases, normal operation of neighboring flash memory cells may be affected.
FIG. 1C is a top view showing the conventional flash memory cell structure as shown in FIGS. 1A and 1B. As shown in FIG. 1C, the active region of a conventional flash memory cell is protected and surrounded by field oxide layers 13. Drain current flows from the drain terminal 11 to the source terminal 12 via a path labeled A. The conventional path (from source terminal to drain terminal) taken by the current is rather long, and hence has a negative effect on its efficiency. Furthermore, as the level of integration continues to increase and dimensions of each flash memory cell is reduced, a source and a drain terminal are closer together that may lead to punch through effect. Hence, in this respect. the level of integration is severely limited.
In summary. a conventional flash memory cell structure has definite limit in the level of integration. Furthermore, with a short-circuiting connection between the drain terminal and the P-well, normal operation of neighboring flash memory cells may be affected. A conventional flash memory cell structure also suffers the defects of a longer drain current path, and a shorter distance between source and drain terminals when devices are miniaturized.
In light of the foregoing, there is a need to provide an improved flash memory cell structure and its method of manufacture.